1. Field of the Invention
The present invention relates to control methods of a power supply, and more particularly relates to control methods when operating under light load or no load conditions of the power supply.
2. Description of the Prior Art
A power supply is used to convert power to within a specific level to power electronic devices or components. The power consumed by the power supply should be as low as possible to improve conversion efficiency. Even small power consumption will decrease conversion efficiency by a great deal, particularly under light load or no load conditions of the power supply. Consequently, a major consideration of designing the power supply is to lower power consumption for light load or no load conditions of the power supply.
A switching mode power supply is designed to operate in skip mode or burst mode under light load or no load conditions. FIG. 1 illustrates a flyback power supply 60 of the prior art. A power management controller 74 controls a power switch 72 to store power from AC input or deliver power to output through a transformer 65. A compensation signal SCOM is controlled by an output voltage VOUT through a feedback loop comprising LT431 and a photo coupler 63. FIG. 2 is a simplified block diagram illustrating a power management controller 74a of the prior art according to one embodiment of FIG. 1. When a burst signal SBST is asserted, a clock generator 86 generates a clock signal SCLK to periodically switch the power switch 72 on and off by a logic controller 62; this is referred to as a switching state. The clock signal SCLK substantially defines switching cycles of the power supply 60. On time of the power switch 72 is controlled by a limiting signal SCS-L and a comparator 82. The limiting signal SCS-L is generated by a level shifter 67, and can be regarded as equivalent to the compensation signal SCOM. A resistor 61 forms a path to a power source Vcc for the compensation signal SCOM. When the compensation signal SCOM is lower than a burst reference voltage VBST-REF, a comparator 84 sets a burst signal SBST to logic 0, hence turning off the power switch 72 regardless of the clock signal SCLK, and maintaining the power switch 72 in a non-switching state. FIG. 3 illustrates possible waveforms of signals SCLK, VG, VCS of the power management controller 74a of FIG. 2 operating under light load or no load. As the compensation signal SCOM varies, a control signal VG of the power management controller 74a forces the power switch 72 to conduct for one or consecutive switching cycles, then turns off the power switch 72 for the following one or consecutive switching cycles. The above described mode is referred to as skip mode or burst mode, and is referred to as burst mode hereinafter.
Burst mode is dedicated to stopping consecutive mostly ineffective switching cycles and focuses power conversion on consecutive more effective switching cycles. Burst mode can cause annoying audible noise without proper control of power conversion in effective switching cycles. For instance, audible noise occurs if the sum of the switching state period TB and the non-switching state period TS, period TG, corresponding to frequency fG, falls within the audible frequency range.